Digital controlled step voltage generator

ABSTRACT

Digital-controlled generator supplying, during a major cycle, a continuous voltage which is proportional to the fraction i/N of a fixed voltage, with i variable in units from O to N, said major cycle having a duration of K minor cycles, of which each lasts N times an elementary duration to.

United States Patent Inventor Joseph Leostic Le Mesnil Saint-Denis,France Appl. No. 757,441 Filed Sept. 4, 1968 Patented May 25, 1971Assignee C.I.T. Compagnie Industrielle Des Telecommunications Paris,France Priority Sept. 4, 1967 France 119905 DIGITAL CONTROLLED STEPVOLTAGE GENERATOR [50] Field of Search 235/92 ,37,52,63,73), (Inquired);328/42, 41, 44, 48, 127,

Primary Examiner-John S. Heyman Attorney-Craig and Antonelli 11 Claims 3Drawing Figs ABSTRACT: Digital-controlled generator supplying, during aUS. Cl 307/264, m j r y l a continuous l g which i pr p i to the 235/92,328/41, 328/48, 328/127, 328/46, fraction i/N of a fixed voltage, with ivariable in units from 0 340/347, 307/227 to N, said major cycle havinga duration of K minor cycles, of Int. Cl [103k 25/00 which each lasts Ntimes an elementary duration t,

(N) 1 1 b COUN ER e 1 TE F PULSE REGIS R H LIP SOURCE FLOP l COU N TE R22 L 21 COUNTER (K) 1 SJ COUNTER PATENIED W25 |97| FIG/l FLIP H73FLOPH-l E (N) J COUNTER COUN ER REGISTER (K) COUNTER PULSE SOURCE I 1DIGITAL CONTROLLED STEP VOLTAGE GENERATOR This invention relates to avoltage generator intended to generate a voltage varying in steps, forexample covering a voltage range of between and U volts, and arranged inparticular to perform a complete scan from O to U volts either once orrepetitively, or else to stop at an intermediate position, or to producea positive or negative increment from an intermediate position.

A voltage generator designed to produce a voltage variable in steps isadvantageously employed, among other purposes, in radio equipment havingan oscillator arranged to deliver different frequencies during anexploring or scanning process in which it is controlled by a polarizingvoltage varied in steps.

Scanning processes using an oscillator generally employ one or twomethods. Either a sawtooth voltage is applied to a variable capacitydiode forming part of the oscillator, or alternatively a voltage varyingin steps isapplied to the diode. The present invention relates to agenerator usable with the latter arrangement.

It is known that a voltage varying in steps may be generated by means ofan electromechanical stepping device, such as a suitably connecteduniselector. The uniselector essentially comprises a ratchet wheeladvancing, by one notch for each electrical pulse received. Instrumentsof this nature are in widespread use in telephony applications, in whichthey yield excellent results.

The number of notches available in a uniselector is not, however verygreat and seldom exceeds fifty, in practice. Also the highest steppingspeed obtainable is only of the order of a few tens of steps per second,for example 20 steps per second. Additionally, this device has only onedirection of operation.

As soon as it becomes necessary to produce a much higher number of stepstherefore, for example several thousands, in a few seconds to obtainmaximum capacity and maximum speed, the electromechanical steppingswitch must give way to an electronic method.

A high-definition and high-speed electronic stepping device may be builtup from a timing system of appropriate frequency, for example amountingto several megacycles, by means of an adding-subtracting counter and anumericalanalog converter, coordinated with a so-called ponderator. lfseveral thousand steps are to be produced however, theconverter-ponderator combination becomes a complex item of apparatus,comprising several decades, incorporating a great number of componentsand being consequently expensive.

An object of the invention is the provision of an improved voltagegenerator able to provide a voltage which varies in steps.

In accordance with the present invention a voltage generator intended togenerate voltage in steps, comprises: means for generating a rectangularelectrical signal pulse having the duration i 1,, in which t is aconstant interval and i is a selected integer which can vary betweenzero and a maximum of N during a minor cycle having the duration T, withT=i N1 means for successively reproducing K indentical minor cyclestogether constituting a major cycle having the duration KT; and,integrating means providing a constant voltage at an output terminalthroughout the period of a major cycle, this voltage being proportionalto the integer i.

The electronic voltage generator of the invention has the advantage thatit can be designed to operate at several thousand successive steps in afew seconds, to stop at an intermediate position, and to operate ineither direction from an intermediate position, such generator yet beingsimple and inexpensive to manufacture.

The invention will now be described in more detail, by way of example,with reference to the accompanying drawings, in which:

FIG. 1 is a schematic block diagram of a generator in accordance withthe invention;

FIG. 2 is a sketch explaining graphically its operation; and

FIG. 3 is a modification of the integrator of FIG. 1.

In FIG. 1, a counter 11 of capacity N receives pulses to be counted atinput terminal a and performs addition or subtraction according to thepolarity of a control voltage applied at input terminal b, for exampleadding for a positive voltage at b, and subtracting for a negativevoltage at b. Counters of this nature are well known in the art. Theinstantaneous value stored in the counter 11 varies relatively slowly,increasing or diminishing by one unit at intervals KT. The values of Kand of T are explained in more detail hereinbelow. The pulses fed toterminal a are supplied by an AND gate 23, whose function is alsoexplained below.

Another counter 13 having the capacity N is connected to receivecounting pulses at intervals t applied by a timing system in the form ofa pulse source 21 through an AND gate 22. A third counter 14 also havingthe capacity N, is connected to receive counting pulses directly fromthe output terminal of the timing system 21. The output terminal of thecounter 14 is connected to the input terminal of a fourth counter 15having a capacity K.

The output terminal of the counter 15 is connected to one input terminalof the AND gate 23 whose output terminal is connected to the terminal aof the counter 11. The-gate 23 has another input terminal which isconnected to an input control terminal A. The control terminal A canassume a binary value 1 to make the gate 23 conductive, and a binaryvalue 0 to block the gate 23.

A coincidence register 12 is connected, on the one hand, to the outputof counter 11 and, on the other hand, to the output of counter 13, andsupplies an output pulse when the counter 13 displays the same value asthe counter 11.

A bistable flip-flop '16 has an input terminal G connected to the outputterminal of the register 12 and output terminal D connected to the inputterminal of an integrator 17. It is possible, for example, for theoutput terminal D of the flip-flop 16 to be set at a voltage of +12volts for a logical value 0 and at a voltage of 0 volts for a logicalvalue l.

The integrator 17 may comprise a known type of storage cell composed ofa transistor 17 having its base electrode connected via resistor R tothe output terminal D of the flip-flop 16, the collector of which isconnected via resistor R to a source of supply voltage and the emitterof which is grounded. The collector of the transistor 17 is alsoconnected via resistor R, tothe output terminal 18, to which capacitor Cis connected in shunt. The transistor in combination with the RC filterperforms an integration of the output from flip-flop 16.

A complementary output terminal E of the flip-flop 16 is connected to acontrol input terminal of the AND gate 22. The output terminal of thecounter 14 which is connected to the input terminal of the counter 15 isalso connected to the counter 13 for resetting it to zero and to asecond input terminal H of the flip-flop 16.

When, during a so-called minor counting cycle, the register 12 detectsthe same value i at both its input terminals, it feeds a binary value ofl to the input terminal G of the flip-flop 16. The counter 14 whichoperates as a fixed order N divider, provides an output pulse each timeit has received N input pulses. The counter 15 which operates as a fixedorder K divider, provides an output pulse each time it has received Kinput pulses from the counter 14.

Terminal B may receive a positive signal, in which case the counter 11is operative in an adding sense, since the input terminal b of thecounter 11 has a positive polarity, or it may receive a negative signal,in which case the counter 11 operates in a subtractive sense.

The circuitry operates as follows:

It is assumed that the value of the signal at terminal A is 1, that thesignal at B is positive and that the counter 11 indicates a value i.Beginning after a resetting action to zero (the method employed becomingapparent hereinafter), the flipflop 16in in the quiescent condition, theterminal D carries the value 0 (+12 volts) and the terminal E the valuel (0 volts), the AND gate 22 is conductive and counter 11 has a count i.The timing pulses from 21 are therefore received by the counter 13. Thetiming pulses are also received directly by the dividing counter I4.

When the instantaneous value i, which is less than N, is reached in thecounter 13, the coincidence register 12 detects coincidence between thecounts in counters I1 and 13 and feeds the analog value I to the inputterminal G of the flip-flop 16. As a result, the point D incurs avoltage drop from +12 to volts, as shown in FIG. 2. AND gate 22 isthereby rendered nonconductive so that counter 13 no longer receivespulses from timing system 21. v

The time required for the timing pulses to fill the counter 14represents a minor cycle having the duration T. At the end of a minorcycle T, the counter 14 feeds a pulse to the input terminalof thedividing counter IS. The pulse emitted every time the counter '14 passesthrough its maximum capacity point N resets the counter 13 and theflip-flop l6 and thereby-renders AND gate 22 conductive once again, sothat counter 13 may begin a new count for the next minor cycle T.

The minor cycles T are then repeated with the count in counter 15increasing by one for each minor cycle. The dividing counter 15, whenfilled, feeds a pulse to the open conductive gate 23 and thus to thecounter 11 at the end of a major cycle of duration KT.

The pulse reaching the counter 11 from gate 23 at the end of K cyclescausesan advance of one unit in the latter. Henceforth, the register 12will detect a coincidence for i+l and so on and so forth: the counter 11being advanced by one unit every K minor cycles, the state ofcoincidence will thus occur for a counting condition plus one unit. I

If the terminal'B is negative, the count stored in counter II would bereduced by one unit in each case, instead of being increased. If thebinary value 0 is applied to the terminal A, the gate 23 is blocked andthe counting condition of thecounter 1-] remains constant. Thecoincidence register I2 would then provide output pulses recurringindefinitely for the same state FIG. 2 shows the rectangular pulses, Kin number, reaching point D at the inputterminal of the integrator 17 aswell as the voltage level obtained at the output terminal I8. When theorder of the steps rises from i to i+l the width of the rectangularpulses increases by one unit in width and the height of the output levelrises by one unit, passing from Vi to Vi+l. If the width of therectangular pulses remains constant, one obtains minor cyclecorresponding to N pulses.

Each step of the output voltage has the duration of a major cycle whichis equal to K minor cycles each having the duration T.

The scan may be stopped at a predetermined step, which is maintained foras long as desired.

The electrical value of a step, for example in volts, is given by anintegration period defined by the order i of the step.

If r, is the interval separating two timing pulses, the duration of aminor cycle T is equal to Ni, the integration period during a cycle is t=i r,,, the duration of a major cycle is equal to t =KT =KN t,,, and theduration of one complete scan is equal to I M KN'r,

As an example of applying this formula, a timing frequency of 10 mc'ls(t -10%) may be adopted, with N=l ,000 and K=l0. According to thefonnula given above, the duration of a complete scan amounts to:r,=K-N"i,,l second.

A modification of the integrator 17 of FIG. I is illustrated in FIG. 3.In this embodiment the integrator is composed of a diode 170, aninductor 17b, a capacitor 17!: and a cell RC. At the output terminal 18,a voltage varying by steps is obtained. A member 24, under the action ofthe maximum capacity of the counter 11, resets the voltage varying insteps to zero by means of a line 25, and this by completely dischargingintegrator 27 when the Nth and last step is reached.

The common emitter amplifier stage formed by transistor 17 of FIG. I isreplaced by the integrator arrangement of FIG.

3, and in every other respect conforms to the first describedembodiment.

I have shown and described several embodiments in accordance with thepresent invention. It is understood that the same is not limited theretobut is susceptible of numerous changes and modifications as known to aperson skilled in the art and I, therefore, do not wish to be limited tothe details shown and described herein, but intend to cover all suchchanges and modifications as are encompassed by the scope of theappended claims.

lclaim:

l. A voltage generator intended to generate voltage in steps,comprising: first means for generating a rectangular electrical signalpulse having the duration it, in which t is a constant interval and i isa selected integer which can vary between zero and a maximum of N duringa minor cycle having the duration T, with T=N-t,,; second meansresponsive to said first means for successively reproducing K identicalminor cycles together constituting a major cycle having the duration KT;and, integrating means connected tosaid first means for providing aconstant voltage at an output terminal throughout the period of a majorcycle, this voltagebeing proportional to the integer i, wherein saidsecond means includes third means for selectively altering the integer iby either +1 or by --l for each major cycle, in which said first meansincludes a timing pulse generator providing pulses at an interval t,,; afirst adding and subtracting counter possessing the capacity N whichstores a numerical value i selected between zero and N; a second counterhaving the capacity N and connected to receive timing pulses from saidtiming pulse generator by way of a first gating circuit; a coincidenceregister connected to said first and second counters providing aswitching signal on detecting coincidence between the instantaneousvalue indicated by the said second counter and the value i stored in thefirst counter; a third .counter having the capacity N and connected toreceive the timing pulses directly and continuously from said timingpulse generator and operating as a fixed order N divider having itsoutput terminal delivering a pulse for the resetting of the secondcounter to zero on completion of each count N; a fourth counterconnected to the output of said third counter having the capacity Koperating as a fixed order K divider, where K is numericallysubstantially less than N, the output from the said fourth counter, whenfilled, being connected to the first counter; and an electronicswitching circuit switched between two respective stable states by saidswitching signal and by the pulse from said third counter, the switchingcircuit providing a square wave voltage pulse of constant height and ofa width proportional to the said number i for each minor cycle suchsquare wave pulse being fed to the input side of the integrating means.

2. A voltage generator as defined in claim 1, in which the first counteris provided with external controls enabling it to act, selectively, asan addition counter or as a subtraction counter.

3. A voltage generator as defined in claim I in which the switchingcircuit comprises a bistable multivibrator.

4. A voltage generator as defined in claim 1 wherein said integratingmeans includes a storage cell formed by a series inductance, a shuntdiode and a shunt capacitor connected between the output of said firstmeans and a resistancecapacitance filter cell.

5. A voltage generator as defined in claim I wherein said integratingmeans includes a transistor amplifier connected between the output ofsaid first means and a resistancecapacitance filter cell.

6. A voltage generator comprising a source of timing pulses provided atconstant intervals 1,,

first counting means connected to said source of timing pulses forgenerating a switching pulse after i timing pulses in each minor cycleof duration T,

second counters, said first counter having a count 1 and said secondcounter being connected to said source of timing pulses via a gate, anda third counter connected directly to said pulse source and having amaximum count of T/t,,.

8. A voltage generator as defined in claim 7 wherein said bistable meansis connected to said gate to disconnect said second counter from saidpulse source during the remaining portion of each minor cycle T aftergeneration of said rectangular signal pulse;

9. A voltage generator as defined in claim 8 wherein said secondcounting means includes a fourth counter connected to said third counterto be advanced one unit each time said third counter reaches its maximumcount and providing a stepping signal each time it reaches its maximumcount, and means to apply said stepping signal to said first counter toalter the count 1 therein by one unit.

10. A voltage generator as defined in claim 9 wherein said first counteris of the type capable of selective addition or subtraction in responseto an applied external control signal.

11. A voltage generator as defined in claim 6 wherein integrating meansis connected to the output of said bistable means to provide a constantvoltage output in steps proportional to the value i.

1. A voltage generator intended to generate voltage in steps,comprising: first means for generating a rectangular electrical signalpulse having the duration i.to in which to is a constant interval and iis a selected integer which can vary between zero and a maximum of Nduring a minor cycle having the duration T, with T N.to; second meansresponsive to said first means for successively reproducing K identicalminor cycles together constituting a major cycle having the duration KT;and, integrating means connected to said first means for providing aconstant voltage at an output terminal throughout the period of a majorcycle, this voltage being proportional to the integer i, wherein saidsecond means includes third means for selectively altering the integer iby either +1 or by -1 for each major cycle, in which said first meansincludes a timing pulse generator providing pulses at an interval to; afirst adding and subtracting counter possessing the capacity N whichstores a numerical value i selected betweeN zero and N; a second counterhaving the capacity N and connected to receive timing pulses from saidtiming pulse generator by way of a first gating circuit; a coincidenceregister connected to said first and second counters providing aswitching signal on detecting coincidence between the instantaneousvalue indicated by the said second counter and the value i stored in thefirst counter; a third counter having the capacity N and connected toreceive the timing pulses directly and continuously from said timingpulse generator and operating as a fixed order N divider having itsoutput terminal delivering a pulse for the resetting of the secondcounter to zero on completion of each count N; a fourth counterconnected to the output of said third counter having the capacity Koperating as a fixed order K divider, where K is numericallysubstantially less than N, the output from the said fourth counter, whenfilled, being connected to the first counter; and an electronicswitching circuit switched between two respective stable states by saidswitching signal and by the pulse from said third counter, the switchingcircuit providing a square wave voltage pulse of constant height and ofa width proportional to the said number i for each minor cycle suchsquare wave pulse being fed to the input side of the integrating means.2. A voltage generator as defined in claim 1, in which the first counteris provided with external controls enabling it to act, selectively, asan addition counter or as a subtraction counter.
 3. A voltage generatoras defined in claim 1 in which the switching circuit comprises abistable multivibrator.
 4. A voltage generator as defined in claim 1wherein said integrating means includes a storage cell formed by aseries inductance, a shunt diode and a shunt capacitor connected betweenthe output of said first means and a resistance-capacitance filter cell.5. A voltage generator as defined in claim 1 wherein said integratingmeans includes a transistor amplifier connected between the output ofsaid first means and a resistance-capacitance filter cell.
 6. A voltagegenerator comprising a source of timing pulses provided at constantintervals to, first counting means connected to said source of timingpulses for generating a switching pulse after i timing pulses in eachminor cycle of duration T, bistable means connected to said firstcounting means for generating a rectangular signal pulse of durationi.to during each minor cycle T, and second counting means connected tosaid first counting means for selectively varying the value i at whichsaid switching signal is generated.
 7. A voltage generator as defined inclaim 6 wherein said first counting means includes first and secondcounters connected to a coincidence circuit producing said switchingpulse upon detection of coincidence in the counts in said first andsecond counters, said first counter having a count i and said secondcounter being connected to said source of timing pulses via a gate, anda third counter connected directly to said pulse source and having amaximum count of T/to.
 8. A voltage generator as defined in claim 7wherein said bistable means is connected to said gate to disconnect saidsecond counter from said pulse source during the remaining portion ofeach minor cycle T after generation of said rectangular signal pulse. 9.A voltage generator as defined in claim 8 wherein said second countingmeans includes a fourth counter connected to said third counter to beadvanced one unit each time said third counter reaches its maximum countand providing a stepping signal each time it reaches its maximum count,and means to apply said stepping signal to said first counter to alterthe count i therein by one unit.
 10. A voltage generator as defined inclaim 9 wherein said first counter is of the type capable of selectiveaddition oR subtraction in response to an applied external controlsignal.
 11. A voltage generator as defined in claim 6 whereinintegrating means is connected to the output of said bistable means toprovide a constant voltage output in steps proportional to the value i.